Computer Engineering · Fall 2026
SDSU COMPE 671 — VLSI Testing
Theory and techniques for testing VLSI circuits and systems. Analog/mixed-signal testing, Automatic Test Pattern Generation (ATPG), boundary scan and core-based testing, Built-in Self-Test (BIST), defect and fault diagnosis, Design For Testability (DFT), logic/fault simulation, memory test, machine learning applications in VLSI testing, scan design/architecture. Formerly numbered as E E 671.
Course requirements
Prerequisites: COMPE 470 or Graduate standing.
- COMPE 470 or Graduate standing.
Fall 2026 enrollment options
Seat status can change| Class # | Format | Status | Seats | Time | Location | Professor | RateMyProfessors |
|---|---|---|---|---|---|---|---|
| 1779 Discussion | In person | Open | 17 / 20 | Mon/Wed 5:00 PM–6:15 PM | AH 3127 | Ke Huang | 4.2/5 · 39 reviews Difficulty 2.7 · 81% take again |